This application claims the priority of Korean Patent Application No. 2003-8449, filed on Feb. 11, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a printed circuit board which is often used during manufacture of a semiconductor package, and more particularly, to an array printed circuit board.
2. Description of the Related Art
An increase in the use of multimedia applications and the advancement in digital processing techniques have triggered an increase in demand for the manufacture of compact, large-capacity, low-power consumption, and multi-functional semiconductor package products, which are capable of processing a large amount of data at a high speed. To satisfy this demand, various kinds of semiconductor package products are often manufactured, but in small amounts. In particular, in order to improve productivity, there is a growing tendency to manufacture array printed circuit boards instead of single printed circuit boards. The array printed circuit board is made by packaging a plurality of single printed circuit boards together.
FIGS. 1 and 2 are front and rear views of a prior art array printed circuit board 100. Referring to FIGS. 1 and 2, a plurality of single printed circuit boards 110, 120, . . . are connected to make the array printed circuit board 100. The first single printed circuit board 110 has a front surface 111 and a rear surface 112. A plurality of front chip mounting regions 111a and a plurality of rear chip mounting regions 112a are disposed on the front surface 111 and the rear surface 112, respectively. The second single printed circuit board 120, which is connected in parallel to the first single printed circuit board 110, also has a front surface 121 and a rear surface 122. Likewise, a plurality of front chip mounting regions 121a and a plurality of rear chip mounting regions 122a are disposed on the front surface 121 and the rear surface 122, respectively. However, the layouts of the front chip mounting regions 111a and 121a are different from those of the rear chip mounting regions 112a and 122a. 
Manufacture of a semiconductor package with the conventional array printed circuit board 100 requires a surface-mounting technique (SMT) process (hereinafter referred to as the ‘SMT process’) where semiconductor elements are mounted on the array printed circuit board 100. The SMT process is performed using surface-mounting equipment. The surface-mounting equipment includes unit apparatuses such as a screen printer, a lead application detector, a chip mounter, and a reflow apparatus. For example, U.S. Pat. No. 6,227,867 discloses a double-sided surface mounting process. However, with the prior art array printed circuit board 100, the SMT process is performed on the rear surfaces 112, 122, . . . after performing the SMT process on the front surfaces 111, 121, . . . . In this case, the layouts of the front surfaces 111, 121, . . . are different from those of the rear surfaces 112, 112, . . . , and thus, it is inconvenient to perform the SMT process on the prior art array printed circuit board 100. For example partial unit apparatuses of the surface-mounting equipment must be changed for each layout.
These inconveniences becomes more serious when manufacturing a multi-layer semiconductor package in which several semiconductor packages are arranged in a multi-layer structure so that they can act as one semiconductor package. In this case, the surface-mounting equipment must be changed between performing the SMT process on the front and rear surfaces of the respective semiconductor packages. Also, since the SMT process must be performed on each layer of the semiconductor package, the number of times the surface-mounting equipment is changed dramatically increases.